BLUF: This post ended up being long, so I am including a synopsis up top.
Recent hardware estimates for some useful quantum computing applications, simulating nitrogen fixation molecules or stealing bitcoins, suggest a lower bound of about 4.5 million physical qubits with currently achievable error rates, architectures, gate times, etc. However, the standard superconducting qubit, the transmon, is so large that at most only a few thousand can fit on a standard 10 mm x 10 mm chip. These qubits are so large because they employ gigantic planar capacitors.
I summarize some recent preprints that put forward two strategies for reducing transmon size by 1000x or more. The first two combine the qubit capacitor with the Josephson junction to create a ‘merged element transmon’. The second two swap the planar capacitor with a parallel plate capacitor using hexagonal boron nitride dielectric. These strategies result in qubits small enough that between 670,000 - 1.8 million qubits can be fit on a standard 10mm x 10mm chip, within striking distance of recent hardware estimates.
While these strategies address qubit miniaturization, more work will be required to miniaturize other large structures on superconducting qubit chips, like the readout resonator.
I really enjoyed reading this paper, The Impact of Hardware Specifications on Reaching Quantum Advantage in the Fault Tolerant Regime, for two reasons. The first is that I like seeing hardware estimates, even if they end up ranging over an order of magnitude or two. Reading this kind of work helps remind me how far we have yet to go. The second reason is that the authors present us with two quantum computing scenarios:
Simulate the FeMo-co molecule, which is important in biological nitrogen fixation. A better understanding of this could, somehow, in some handwavey way, help us improve the Haber-Bosch process of artificial nitrogen fixation1.
OR
Steal some bitcoin by cracking the public keys during the 10 - 60 minutes potential transactions sit in the ‘mempool’.
I’ve written in the past about the insanity of using quantum computing to attack bitcoin, but those estimates were far more pessimistic than the ones quoted by Webber et. al. in this new preprint. I encourage you to read it, there are many references to interesting rabbit holes (AutoCCZ factories, distilling magic states, etc) that are bread and butter to theorists, but which I, a simple experimental physicist, rarely touch.
Amusing juxtapositions aside, where am I going with this? Well the punchline of the paper is basically that, depending on a whole host of experimental considerations, ranging from qubit type (superconducting or trapped ion), experiment repetition rates, error rates, circuit depth, available time, these computations could require between a few million and a few billion physical qubits.
Ok so yes, there are three orders of magnitude in that estimate, but for our purposes let’s just choose the extreme low end. 4.5 million physical qubits. This lower bound estimate also requires that we use superconducting qubits, thanks to their fast gates and fast experimental rep rate. So that’s 4.5 million transmon qubits, perhaps the same kind you might find if you cracked open Google’s Sycamore processor (54 qubits).
Have you ever seen a transmon? They’re freaking huge.
Here’s a look at the transmons that Google uses in their circuits2.
Ignoring all of the other bits except for the Xmon (it’s the big + in the figure), you can see that it has an absolutely massive footprint. The Josephson junctions themselves are shown in the inset, and they are a relatively tiny portion of the whole structure. Most of the X in Xmon is devoted to capacitance! Superconducting qubits are, at their most reductive, fancy LC oscillators. You get the inductance, L, from the Josephson junctions, but the capacitance, C, mostly comes from the arms of the X. So we’re talking something like a 200 µm x 200 µm footprint for one qubit, or 40,000 sq. µm.
From a few minutes of Googling, my best guess is that the usable area on the Sycamore processor is probably 100 sq. mm. Thus, if you were able to fill every square micron of usable area with Xmons, you would end up with a grand total of 2500 qubits. A far cry short of the 4,500,000 physical qubits we’d need to improve nitrogen fixation or … steal some bitcoin.
If we’re dead set on doing these computations, we have two options.
Use bigger chips to fit more qubits.
Use smaller qubits.
Do 1 and 2.
OK, 2 linearly independent options3.
Option 1 alone is a total non-starter. 2500 qubits falls short of our target of 4.5 million by a factor of about 1800. We’d need chips 420 mm on a side to fit all of those qubits. For comparison, the biggest silicon wafers currently in use in the most advanced semiconductor fabs are 450 mm in diameter.
Option 2 is where things get interesting. Recall our gigantic Xmon from above. What if we didn’t need that huge X shape to hit our capacitance targets? What if we could somehow rejigger the transmon to get that capacitance from somewhere else?
Enter the Merged Element Transmon.
If you’re reading this, you probably already know that a Josephson junction is basically just a thin dielectric sandwiched between two superconductors (if not, you might like this intro to superconducting qubits). This dielectric sandwich introduces capacitance into the circuit, but usually it’s far too small to be worth mentioning.
What if, instead, you could fabricate the junctions such that, not only do they meet the required critical current targets, but also act as the qubit’s capacitor? This is exactly what the team from IBMQ reports in their paper on the Merged Element Transmon4 (MET). Let me quote from the abstract:
We have demonstrated a superconducting transmon qubit in which a Josephson junction has been engineered to act as its own parallel shunt capacitor. This merged-element transmon (MET) potentially offers a smaller footprint than conventional transmons.
The authors describe single junction transmons with area ~1.4 sq. µm, and, based on the figures, I’m guessing that the two junction device has a footprint of ~100 sq. µm. The junction footprint, plus the 50 sq. µm coupling antenna to the readout resonators puts the qubits somewhere between 50 - 150 sq. µm. If we were to pattern a 100 sq. mm chip with the largest of these qubits, we could fit about 670,000 qubits. That’s real progress! It also promising that the coherence and lifetime of these qubits is more or less in line with more standard transmon varieties.
One interesting idea that’s worth mentioning here is a neat twist on the MET concept, which saves chip space by plating thin vertical silicon fins with aluminum to create junctions. They call it the FinMET5. Again, I’ll pull from the abstract:
A merged-element transmon (MET) device, based on Si fins, is proposed and the steps to form such a “FinMET” are demonstrated. … By implementing low-loss, intrinsic float-zone Si as the barrier material rather than commonly used, lossy Al2O3, the FinMET is expected to overcome problems with standard transmons by (1) reducing dielectric losses; (2) minimizing the formation of two-level system spectral features; (3) exhibiting greater control over barrier thickness and qubit frequency spread, especially when combined with commercial fin fabrication and atomic-layer digital etching; (4) reducing the footprint by four orders of magnitude; and (5) allowing scalable fabrication.
The abstract does a great job laying out the reasons why this could be a good idea. We know how to make pure silicon really really well, so you can form it into a fin and use it as the junction barrier and it should do a number of things all at once. You’d expect defect free silicon to substantially reduce two level systems coupled to the qubit (the bane of superconducting qubits), it should also act as a really high quality dielectric, which means that the qubit lifetime and coherence (T1 and T2, respectively) could actually be improved in this qubit design!
Although the fins described in the paper are about 80 nm wide and 30 µm long, the authors claim that optimal FinMET structures will be 5-10 nm wide with area 10 sq. µm., so ~3 µm on a side. Apparently such structures aren’t impossible, merely “on the cutting edge of modern fin technologies”. Honestly, that’s a huge win in my book. At this point you have a comically small qubit footprint, 0.03 sq. µm! The size of all the other parts of the qubit, wiring for flux biasing, wiring to couple to a readout resonator, etc will basically determine the size of the device. Hard to imagine it being much smaller than 50 sq. µm. So conceivably you could get 3x more qubits on a chip than we did with the IBM MET estimate, so something like 2 million qubits. This gets us to within striking distance of the 4.5 million qubits we might need to revolutionize nitrogen fixation (or steal some cryptocurrency). Frustratingly, this paper doesn’t have any measurements of actual FinMET qubits, so we’ve yet to see definitive proof that this is a viable route for qubit miniaturization.
What we’ve seen so far focuses on redesigning the Josephson junction to pull double duty as a junction and qubit shunt capacitor, but there is another way: parallel plate capacitors. Instead of lateral capacitors, like the X in the Xmon, introduce a low loss dielectric to form a parallel plate capacitor in your qubit. The parallel plate capacitor is a much more efficient use of space, it’s just important to make sure that the material you put inside doesn’t suck. An MIT6 - Raytheon BBN7 joint submission appears to have settled on hexagonal boron nitride (hBN) as their material of choice. The BBN preprint claims the qubit area can be reduced by about 1000x from ‘industry standard’ planar capacitor designs, which they estimate to be ~100,000 sq. µm. Taken at face value, that puts us at qubits with footprint around ~ 100 sq. µm, more or less in line with the (Fin)MET design.
All of these areas can be annoying to keep straight, so here’s an illustration. The large red area, 200 µm on a side, is a representation of the current transmon qubit footprint. The small blue squares in the lower left represent an area of 100 sq. µm, the mid range of qubit sizes we’ve estimated using either the (Fin)MET design or the hBN parallel plate capacitors. Quite a difference!
All of this is just a lengthy way of saying that, given our best estimates for implementing useful algorithms require millions of physical qubits, current standard transmon designs are far too large to permit enough such qubits to be printed on a single chip, even one the size of the largest silicon wafers. Thus, the superconducting qubit field as a whole needs to radically miniaturize the transmon design, or transition to some other, smaller or much higher fidelity qubit. What I describe here are just a few efforts in the direction of using novel materials or methods to drastically shrink the transmon while more or less maintaining the good qubit metrics we come to expect.
What I haven’t talked about, and probably deserves its own lengthy post, is the fact that the current method of qubit readout, dispersive resonator shift, requires that each qubit is coupled to a gigantic (go back and look at the readout resonator in Fig 1), millimeters long and microns wide resonator, which ends up dwarfing even the largest qubits in size. Not only do we have to solve the big qubit problem, we also need to solve the problem of reading them all out in a space and time efficient way!
PS: I haven’t talked much about the size constraints for ion trap or neutral atom quantum computing architectures, mostly because I’m not familiar with them. If you’re annoyed by that and want to tell me all about it, please don’t hesitate!
According to Wikipedia, at current levels of production, the Haber-Bosch process consumes 3-5% of the world’s natural gas production and 1-2% of global energy supply.
R. Barends, J. Kelly, A. Megrant, D. Sank, E. Jeffrey, Y. Chen, Y. Yin, B. Chiaro, J. Mutus, C. Neill, P. O’Malley, P. Roushan, J. Wenner, T. C. White, A. N. Cleland, and John M. Martinis 2013 Phys. Rev. Lett.111 080502
Fine, yes, technically you can improve your gate fidelities, too.
Merged-Element Transmons: Design and Qubit Performance
arXiv:2103.09163 [quant-ph]
Merged-element transmons on Si fins: the FinMET
arXiv:2108.11519 [quant-ph]
Hexagonal Boron Nitride (hBN) as a Low-loss Dielectric for Superconducting Quantum Circuits and Qubits
arXiv:2109.00015 [cond-mat.mes-hall]
Miniaturizing transmon qubits using van der Waals materials
arXiv:2109.02824 [quant-ph]